The present invention relates to analog voltage comparators, and more specifically to analog voltage comparators suitable for use with NMOS circuitry.
NMOS circuitry has the characteristics of high speed and high circuit density, and therefore is useful for high speed digital applications. Analog voltage comparators, which compare two analog voltages, determine which voltage is greater, and provide a digital result, are useful in high speed digital applications. However, building analog voltage comparators suitable for use with NMOS technology has been difficult because the NMOS transistors have low gain and limited voltage range, and complementary PMOS transistors are not available. Prior art NMOS analog voltage comparators have been built using multi-stage differential amplifiers and complex level-shifting circuits which have resulted in slow response times. Also, these prior art comparators have required additional power sources. Consequently, prior art solutions have been inefficient and slow when used for analog comparisons.